DESIGN AND ANALYSIS OF LOW NOISE LOW POWER FREQUENCY SYNTHESIZERS FOR WIRELESS COMMUNICATIONS USING 90 NM CMOS TECHNOLOGY
Phase-Locked Loop (PLL) based frequency synthesizer is one of the most crucial components in mobile or wireless communications. It is mainly used for frequency multiplication with the help of a PLL. With the development of RFICs in the wireless communication sector, researchers are trying their b...
Shranjeno v:
| Glavni avtor: | |
|---|---|
| Format: | Thesis |
| Jezik: | angleščina |
| Izdano: |
DEPARTMENT OF ELECTRICAL, ELECTRONIC AND COMMUNICATION ENGINEERING
2022
|
| Online dostop: | http://dspace.mist.ac.bd:8080/xmlui/handle/123456789/713 |
| Oznake: |
Brez oznak, prvi označite!
|