Yalamanchili, S. (2001). Introductory VHDL: From simulation to synthesis. Prentice Hall.
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Citação norma Chicago
Yalamanchili, Sudhakar. Introductory VHDL: From Simulation to Synthesis. Upper Saddle River, NJ ; New Delhi: Prentice Hall, 2001.
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Citação norma MLA
Yalamanchili, Sudhakar. Introductory VHDL: From Simulation to Synthesis. Prentice Hall, 2001.
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Nota: a formatação da citação pode não corresponder 100% ao definido pela respectiva norma.