Lua APA (7ú heag.)
Yalamanchili, S. (2001). Introductory VHDL: From simulation to synthesis. Prentice Hall.
Lua i Stíl Chicago (17ú heag.)
Yalamanchili, Sudhakar. Introductory VHDL: From Simulation to Synthesis. Upper Saddle River, NJ ; New Delhi: Prentice Hall, 2001.
Lua MLA (9ú heag.)
Yalamanchili, Sudhakar. Introductory VHDL: From Simulation to Synthesis. Prentice Hall, 2001.
Rabhadh: Seans nach mbeach na luanna seo go hiomlán cruinn i ngach uile chás.