CMOS circuit design, layout, and simulation /

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Bibliographische Detailangaben
1. Verfasser: Baker, R. Jacob, 1964-
Körperschaft: Institute of Electrical and Electronics Engineers
Format: Buch
Sprache:Englisch
Veröffentlicht: New Delhi : IEEE Press, Wiley, c2005 [Reprinted, 2011]
Ausgabe:2nd ed.
Schriftenreihe:IEEE Press series on microelectronic systems
Schlagworte:
Online-Zugang:Contributor biographical information
Publisher description
Table of contents only
Book review (E-STREAMS)
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100 1 |a Baker, R. Jacob,  |d 1964- 
245 1 0 |a CMOS circuit design, layout, and simulation /  |c R. Jacob Baker. 
250 |a 2nd ed. 
260 |a New Delhi :  |b IEEE Press,  |b Wiley,  |c c2005 [Reprinted, 2011] 
300 |a xxxiii, 1038 p. :  |b ill. ;  |c 25 cm. 
490 |a IEEE Press series on microelectronic systems 
500 |a "IEEE Solid-State Circuits Society, sponsor." 
504 |a Includes bibliographical references and index. 
541 |e 33541 
650 0 |a Metal oxide semiconductors, Complementary  |x Design and construction. 
650 0 |a Integrated circuits  |x Design and construction. 
650 0 |a Metal oxide semiconductor field-effect transistors. 
710 2 |a Institute of Electrical and Electronics Engineers. 
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856 4 2 |3 Publisher description  |u http://www.loc.gov/catdir/enhancements/fy0620/2004275960-d.html 
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