Samankaltaisia teoksia: A CONTROL-OPTIMIZED AND ULTRA-COMPACT CRYPTOGRAPHIC VLSI ARCHITECTURE FOR ENHANCED DATA SECURITY /
- ENHANCING CRYPTOGRAPHIC SECURITY THROUGH GRAPH-BASED ENCRYPTION USING MINIMUM SPANNING TREES /
- ATM BOOTH SECURITY ENHANCEMENT WITH DOUBLE PERSON DETECTION METHOD /
- Optimal Control : Linear Quadratic Methods /
- ULTRA SHORT TERM LOAD FORECASTING TECHNIQUES BASED ON KOLMOGOROV ARNOLD-RNN NETWORK /
- MODELLING AND FDTD ANALYSIS OF A COUPLING ENHANCED ITO BASED COMPACT HYBRID PLASMONIC ELECTRO OPTIC MODULATOR FOR PIC APPLICATIONS /
- PERFORMANCE ASSESSMENT OF METAHEURISTIC OPTIMIZED PID CONTROLLERS FOR MULTI-AREA LOAD FREQUENCY CONTROL /
Aihe: Electrical, Electronic and Communication Engineering.
- INTERPOLATION BASED ADAPTIVE REVERSIBLE DATA HIDING FOR DIGITAL IMAGE APPLICATIONS /
- ENERGY EFFICIENT OPERATIONS OF COMP BASED LTE-A CELLULAR NETWORKS WITH HYBERID POWER SUPPLIES /
- DESIGN AND CHARACTERIZATION OF BULK AND SOL FINFETS /
- BASE TRANSIT OF A GRADED BANE ALyGa1-yAs HBT USING THE ANALYTICAL MODEL DEVELOPED FOR SIGE DEVICE WITH FOR GAUSSIAN DOPED BASE /
- THE EARLY VOLTAGE AND CURRENT GAIN OF IN GA AS DOUBLE HETERO JUNCTION BIPOLAR TRANSISTOR /
- EFFECT OF POLARIZATION MODE DISPERSION (PMD) IN DIFFERENT CORE SHAPES AND BIT ERROR RATE (BER) PERFORMANCE IN FIBER OPTIC COMMUNICATION /
Aihe: This Thesis Paper of EECE in BSc Program.
- ANALYSIS OF BER PERFORMANCE ON DIFFERENT MODULATION TECHNIQUES OVER AWGN CHANNEL /
- DESIGN OF A DUAL-BAND MICROSTRIP PATCH ANTENNA WITH ENHANCED BANDWIDTH AND GAIN FOR 5G APPLICATIONS /
- CLASSIFICATION OF AUTISM SPECTRUM DISORDER FROM RS-FMRI SCANS BY FEATURE REDUCTION ON ENSEMBLE MACHINE LEARNING AND CNN/
- INVESTIGATION OF THE TOPSIDE IONOSPHERE OVER BANGLADESH USING SWARM, COSMIC AND GNSS DATA INCLUDING IRI PREDICTIONS /
- INVESTIGATION OF IONOSPHERIC DIURNAL DOUBLE MAXIMA OVER BANGLADESH /
- FREQUENCY STABILITY ENHANCEMENT WITH VSG CONTROL FOR A PV DOMINATED GRID /
Tekijä: Hasan, M Mehedi
Tekijä: Supervised by Lt Col Md Tawfiq Amin
- A CONTROL-OPTIMIZED AND ULTRA-COMPACT CRYPTOGRAPHIC VLSI ARCHITECTURE FOR ENHANCED DATA SECURITY /
- DESIGN AND ANALYSIS OF ENERGY EFFECIENT SRAM ARRAY USING 8T SRAM CELL WITH IN-MEMORY MAC CAPABILITIES FOR EDGE AI APPLICAATIONS /
- DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER LOW NOISE DUAL GATED GRAPHENE-MOSFET BASED VCO FOR WIRELESS APPLICATIONS /
- PHYSICS BASED MODELING AND CIRCUIT LEVEL EVALUATION OF SI-ON SIC MOSFET FOR HIGH-SPEED AND LOW POWER VLSI APPLICATIONS /
- DESIGN AND ANALYSIS OF A 5GB/S HALF-RATE CLOCK AND DATA RECOVERY CIRCUIT IN 90 NM CMOS TECHNOLOGY /
- DESIGN AND ANALYSIS OF AN ARFA EFFICIENT AND LOW POWER VCO BASED ADC FOR BIOMEDICAL APPLICATIONS /