समान संसाधन: DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER LOW NOISE DUAL GATED GRAPHENE-MOSFET BASED VCO FOR WIRELESS APPLICATIONS /
- DESIGN AND ANALYSIS OF AN ARFA EFFICIENT AND LOW POWER VCO BASED ADC FOR BIOMEDICAL APPLICATIONS /
- DESIGN AND ANALYSIS OF LOW NOISE LOW POWER FREQUENCY SYNTHESIZERS FOR WIRELESS COMMUNICATIONS USING 90 NM CMOS TECHNOLOGY
- DESIGN AND PERFORMANCE ANALYSIS OF A LOW POWER SMALL AREA RFID TRANSPONDER FOR WIRELESS COMMUNICATION APPLICATIONS /
- PHYSICS BASED MODELING AND CIRCUIT LEVEL EVALUATION OF SI-ON SIC MOSFET FOR HIGH-SPEED AND LOW POWER VLSI APPLICATIONS /
- DESIGN AND PERFORMANCE ANALYSIS OF A LOW POWER SMALL AREA RFID TRANSPONDER FOR WIRELESS COMMUNICATION APPLICATIONS
- FEBRICATION AND PERFORMANCE EVALUATION OF LOW COST HIGH IMPACT RESISTANT COMPOSITE /
विषय: Electrical, Electronic and Communication Engineering
- INTERPOLATION BASED ADAPTIVE REVERSIBLE DATA HIDING FOR DIGITAL IMAGE APPLICATIONS /
- ENERGY EFFICIENT OPERATIONS OF COMP BASED LTE-A CELLULAR NETWORKS WITH HYBERID POWER SUPPLIES /
- DESIGN AND CHARACTERIZATION OF BULK AND SOL FINFETS /
- BASE TRANSIT OF A GRADED BANE ALyGa1-yAs HBT USING THE ANALYTICAL MODEL DEVELOPED FOR SIGE DEVICE WITH FOR GAUSSIAN DOPED BASE /
- THE EARLY VOLTAGE AND CURRENT GAIN OF IN GA AS DOUBLE HETERO JUNCTION BIPOLAR TRANSISTOR /
- EFFECT OF POLARIZATION MODE DISPERSION (PMD) IN DIFFERENT CORE SHAPES AND BIT ERROR RATE (BER) PERFORMANCE IN FIBER OPTIC COMMUNICATION /
विषय: This Thesis paper of EECE in M.Sc. program
- ENHANCED DETECTION AND ANOMALY IDENTIFICATION IN CHIPLESS RFID SYSTEMS USING SCALABLE MACHINE LEARNING MODELS /
- MILLIMETER WAVE ON-CHIP DIELECTRIC RESONATOR ANTENNAS FOR ENHANCED BODY-CENTRIC WIRELESS COMMUNICATION /
- DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER LOW NOISE DUAL GATED GRAPHENE-MOSFET BASED VCO FOR WIRELESS APPLICATIONS /
लेखक: Reza, Md Selim
लेखक: Supervised by Lt Col Md Tawfiq Amin
- A CONTROL-OPTIMIZED AND ULTRA-COMPACT CRYPTOGRAPHIC VLSI ARCHITECTURE FOR ENHANCED DATA SECURITY /
- DESIGN AND ANALYSIS OF ENERGY EFFECIENT SRAM ARRAY USING 8T SRAM CELL WITH IN-MEMORY MAC CAPABILITIES FOR EDGE AI APPLICAATIONS /
- PHYSICS BASED MODELING AND CIRCUIT LEVEL EVALUATION OF SI-ON SIC MOSFET FOR HIGH-SPEED AND LOW POWER VLSI APPLICATIONS /
- DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER LOW NOISE DUAL GATED GRAPHENE-MOSFET BASED VCO FOR WIRELESS APPLICATIONS /
- DESIGN AND ANALYSIS OF A 5GB/S HALF-RATE CLOCK AND DATA RECOVERY CIRCUIT IN 90 NM CMOS TECHNOLOGY /
- DESIGN AND ANALYSIS OF AN ARFA EFFICIENT AND LOW POWER VCO BASED ADC FOR BIOMEDICAL APPLICATIONS /